Microprocessor Architecture

Name of the course Online Lecture Exercises Lab
Microprocessor Architecture -

The course aims to introduce students to the basic principles of microprocessor architecture. As this field of engineering is huge it cannot cover all topics. The basic content of the course gives the foundation on which the advanced content is going to be adapted to current topics in industry and research. The fundamental parts of the course are closely related to the structure of the book "Computer Architecture, 6th Edition" by Hennessy and Patterson.

Having completed the course, students will understand basic microprocessor structures, their requirements and challenges. They're supposed to be able to comment on microprocessor designs based on simple performance trade-offs. Participants will understand the major types and concepts of microprocessor designs and how processor performance is affected by these concepts.

The course "Microprocessor Architecture" can be completed stand-alone to grasp the content from a theoretic perspective or in a series of courses with "SystemVerilog for Design" and "SystemVerilog for Verification" to become a practitioner. The course does not introduce basics in digital or analog engineering. Participants are therefore highly recommended to have or get basic knowledge in digital and analog engineering on at least bachelor's level before applying for this course.

This course is currently in the planning phase ...

Course content

Part Content Script*
1 Introduction to Computer Architecture - Technology, Power, Cost and Performance [PDF*]
2 Memory - Cache and Cache Performance, Virtual Memory, Memory Hierarchies [PDF*]
3 Instruction Level Parallelism - Branch Cost and Branch Prediction, Data Hazards and Dynamic Scheduling, Multithreading [PDF*]
4 Data Level Parallelism - Parallel Architecures, SIMD Extensions [PDF*]
5 Thread-Level Parallelism - Shared Memory and Synchronization, Performance of Multicore Processors [PDF*]
6 Instruction Sets - Classification, Memory Adressing, Operand Size, Operations [PDF*]
7 Classification of Instruction Sets - RISC, CISC, VLIW and EPIC [PDF*]
8 Instruction Set Architectures - RISC-V, MIPS, Intel64 and IA-32, OpenPower [PDF*]
*under work


[1] Computer Architecture, Hennessy and Patterson, 6th Edition
      Morgan Kaufmann 2019, ISBN 978-0-12-811905-1