Coverage Summary Report, Instance-Based
Top Level SummaryLegend and Help
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Instance name: tb_top.fma_top_I.ros_if_double Type name: ros_if File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/ros_if.sv |
Coverage Summary Report, Instance-Based
| Overall | Overall Covered | Block | Expression | Toggle | FSM State | FSM Transition | Assertion | CoverGroup | CoverGroup Covered | name |
|---|---|---|---|---|---|---|---|---|---|---|
| 99.34% | 99.34% (150/151) | n/a | n/a | 99.34% (150/151) | n/a | n/a | n/a | n/a | n/a | ros_if_double |
Uncovered Block Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_if_double Type name: ros_if File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/ros_if.sv Number of uncovered blocks: 0 of 0 Number of unreachable blocks: 0 |
Count Block Line Kind Origin Source Code ------------------------------------------------------------------------------ 0 items found
Uncovered Expression Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_if_double Type name: ros_if File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/ros_if.sv Number of uncovered expressions: 0 of 0 Number of unreachable expressions: 0 |
index | grade | line | expression ------------------------------------------------------------------------------------- 0 items found
Uncovered Toggle Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_if_double Type name: ros_if File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/ros_if.sv Number of uncovered signal bits: 1 of 151 Number of unreachable signal bits: 0 Number of signal bits partially toggled(rise): 0 of 151 Number of signal bits partially toggled(fall): 0 of 151 |
Hit(Full) Hit(Rise) Hit(Fall) Signal ----------------------------------------------------------- 0 0 0 exception_flags[3]
Uncovered Fsm Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_if_double Type name: ros_if File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/ros_if.sv |
0 items found
Uncovered Assertion Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_if_double Type name: ros_if File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/ros_if.sv Number of uncovered assertions: 0 of 0 |
Finished Failed Assertion Line Source Code ------------------------------------------------------------------------------------ 0 items found
Uncovered CoverGroup Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_if_double Type name: ros_if File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/ros_if.sv Number of uncovered cover bins: 0 of 0 |
0 items found