Coverage Summary Report, Instance-Based
Top Level SummaryLegend and Help
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Instance name: tb_top.fma_top_I.ros_single_I Type name: rounding_overflow_signhandling File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/rounding_overflow_signhandling.sv |
Coverage Summary Report, Instance-Based
| Overall | Overall Covered | Block | Expression | Toggle | FSM State | FSM Transition | Assertion | CoverGroup | CoverGroup Covered | name |
|---|---|---|---|---|---|---|---|---|---|---|
| 84.61% | 69.52% (130/187) | 90.32% (28/31) | 100.00% (8/8) | 63.51% (94/148) | n/a | n/a | n/a | n/a | n/a | ros_single_I |
Uncovered Block Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_single_I Type name: rounding_overflow_signhandling File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/rounding_overflow_signhandling.sv Number of uncovered blocks: 3 of 31 Number of unreachable blocks: 0 |
Count Block Line Kind Origin Source Code ------------------------------------------------------------------------------ 0 8 135 a case item of 123 rounding_result = 1'b0; 0 16 168 a case item of 144 begin 0 25 207 a case item of 183 begin
Uncovered Expression Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_single_I Type name: rounding_overflow_signhandling File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/rounding_overflow_signhandling.sv Number of uncovered expressions: 0 of 8 Number of unreachable expressions: 0 |
index | grade | line | expression -------------------------------------------------------------------------------------
Uncovered Toggle Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_single_I Type name: rounding_overflow_signhandling File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/rounding_overflow_signhandling.sv Number of uncovered signal bits: 54 of 148 Number of unreachable signal bits: 0 Number of signal bits partially toggled(rise): 0 of 148 Number of signal bits partially toggled(fall): 0 of 148 |
Hit(Full) Hit(Rise) Hit(Fall) Signal ----------------------------------------------------------- 0 0 0 divide_by_zero 0 0 0 calculated_result[30] 0 0 0 calculated_result[29] 0 0 0 calculated_result[28] 0 0 0 calculated_result[27] 0 0 0 calculated_result[26] 0 0 0 calculated_result[25] 0 0 0 calculated_result[24] 0 0 0 calculated_result[23] 0 0 0 calculated_result[22] 0 0 0 calculated_result[21] 0 0 0 calculated_result[20] 0 0 0 calculated_result[19] 0 0 0 calculated_result[18] 0 0 0 calculated_result[17] 0 0 0 calculated_result[16] 0 0 0 calculated_result[15] 0 0 0 calculated_result[14] 0 0 0 calculated_result[13] 0 0 0 calculated_result[12] 0 0 0 calculated_result[11] 0 0 0 calculated_result[10] 0 0 0 calculated_result[9] 0 0 0 calculated_result[8] 0 0 0 calculated_result[7] 0 0 0 calculated_result[6] 0 0 0 calculated_result[5] 0 0 0 calculated_result[4] 0 0 0 calculated_result[3] 0 0 0 calculated_result[2] 0 0 0 calculated_result[1] 0 0 0 calculated_result[0] 0 0 0 special_val_result[21] 0 0 0 special_val_result[20] 0 0 0 special_val_result[19] 0 0 0 special_val_result[18] 0 0 0 special_val_result[17] 0 0 0 special_val_result[16] 0 0 0 special_val_result[15] 0 0 0 special_val_result[14] 0 0 0 special_val_result[13] 0 0 0 special_val_result[12] 0 0 0 special_val_result[11] 0 0 0 special_val_result[10] 0 0 0 special_val_result[9] 0 0 0 special_val_result[8] 0 0 0 special_val_result[7] 0 0 0 special_val_result[6] 0 0 0 special_val_result[5] 0 0 0 special_val_result[4] 0 0 0 special_val_result[3] 0 0 0 special_val_result[2] 0 0 0 special_val_result[1] 0 0 0 special_val_result[0]
Uncovered Fsm Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_single_I Type name: rounding_overflow_signhandling File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/rounding_overflow_signhandling.sv |
0 items found
Uncovered Assertion Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_single_I Type name: rounding_overflow_signhandling File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/rounding_overflow_signhandling.sv Number of uncovered assertions: 0 of 0 |
Finished Failed Assertion Line Source Code ------------------------------------------------------------------------------------ 0 items found
Uncovered CoverGroup Detail Report, Instance Based
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Instance name: tb_top.fma_top_I.ros_single_I Type name: rounding_overflow_signhandling File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/rounding_overflow_signhandling.sv Number of uncovered cover bins: 0 of 0 |
0 items found