Coverage Summary Report, Instance-Based
Top Level SummaryLegend and Help
Instance name: tb_top.fma_top_I.shift_aligner_I Type name: shift_aligner File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/shift_aligner.sv |
Coverage Summary Report, Instance-Based
Overall | Overall Covered | Block | Expression | Toggle | FSM State | FSM Transition | Assertion | CoverGroup | CoverGroup Covered | name |
---|---|---|---|---|---|---|---|---|---|---|
97.27% | 94.61% (456/482) | 100.00% (5/5) | n/a | 94.55% (451/477) | n/a | n/a | n/a | n/a | n/a | shift_aligner_I |
Uncovered Block Detail Report, Instance Based
Instance name: tb_top.fma_top_I.shift_aligner_I Type name: shift_aligner File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/shift_aligner.sv Number of uncovered blocks: 0 of 5 Number of unreachable blocks: 0 |
Count Block Line Kind Origin Source Code ------------------------------------------------------------------------------ 0 items found
Uncovered Expression Detail Report, Instance Based
Instance name: tb_top.fma_top_I.shift_aligner_I Type name: shift_aligner File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/shift_aligner.sv Number of uncovered expressions: 0 of 0 Number of unreachable expressions: 0 |
index | grade | line | expression ------------------------------------------------------------------------------------- 0 items found
Uncovered Toggle Detail Report, Instance Based
Instance name: tb_top.fma_top_I.shift_aligner_I Type name: shift_aligner File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/shift_aligner.sv Number of uncovered signal bits: 26 of 477 Number of unreachable signal bits: 0 Number of signal bits partially toggled(rise): 0 of 477 Number of signal bits partially toggled(fall): 0 of 477 |
Hit(Full) Hit(Rise) Hit(Fall) Signal ----------------------------------------------------------- 0 0 0 d_upper_bound[12] 0 0 0 d_upper_bound[11] 0 0 0 d_upper_bound[10] 0 0 0 d_upper_bound[9] 0 0 0 d_upper_bound[8] 0 0 0 d_upper_bound[7] 0 0 0 d_upper_bound[6] 0 0 0 d_upper_bound[5] 0 0 0 d_upper_bound[4] 0 0 0 d_upper_bound[3] 0 0 0 d_upper_bound[2] 0 0 0 d_upper_bound[1] 0 0 0 d_upper_bound[0] 0 0 0 d_lower_bound[12] 0 0 0 d_lower_bound[11] 0 0 0 d_lower_bound[10] 0 0 0 d_lower_bound[9] 0 0 0 d_lower_bound[8] 0 0 0 d_lower_bound[7] 0 0 0 d_lower_bound[6] 0 0 0 d_lower_bound[5] 0 0 0 d_lower_bound[4] 0 0 0 d_lower_bound[3] 0 0 0 d_lower_bound[2] 0 0 0 d_lower_bound[1] 0 0 0 d_lower_bound[0]
Uncovered Fsm Detail Report, Instance Based
Instance name: tb_top.fma_top_I.shift_aligner_I Type name: shift_aligner File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/shift_aligner.sv |
0 items found
Uncovered Assertion Detail Report, Instance Based
Instance name: tb_top.fma_top_I.shift_aligner_I Type name: shift_aligner File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/shift_aligner.sv Number of uncovered assertions: 0 of 0 |
Finished Failed Assertion Line Source Code ------------------------------------------------------------------------------------ 0 items found
Uncovered CoverGroup Detail Report, Instance Based
Instance name: tb_top.fma_top_I.shift_aligner_I Type name: shift_aligner File name: /home/mfertig/riscv2/riscv_FPU/modules/fma/shift_aligner.sv Number of uncovered cover bins: 0 of 0 |
0 items found